1. Field of the Invention
The present invention relates to an apparatus for testing a semiconductor integrated circuit, and more particularly to an apparatus and method for testing a semiconductor integrated circuit comprising an analog-to-digital converter circuit for converting an analog signal into a digital signal and a digital-to-analog converter circuit for converting a digital signal into an analog signal.
2. Background Art
Recently, in relation to a system LSI embodied in a one-chip semiconductor integrated circuit (a one-chip LSI) consisting of a plurality of functionally-systematized circuit modules or embodied in a hybrid integrated circuit (a chip set LSI), combination of digital and analog circuits (i.e., a system LSI handling a mixed signal), having high performance and precision, has been rapidly pursued. Even in relation to a test apparatus for a semiconductor integrated circuit, development of a test apparatus capable of handling a mixed signal is also pursued. Tester manufacturers have provided testers coping with a semiconductor integrated circuit using a mixed signal.
A tester compatible with a semiconductor integrated circuit using a mixed signal has a tendency to become expensive in order to comply with high performance specifications. For this reason, moves are afoot to recycle an existing low-speed, low-precision tester which has been used for, e.g., a logic LSI, to thereby avoid a hike in the price of a tester.
A big problem with such a test apparatus lies in a characteristic test for a D/A converter circuit for converting a digital signal into an analog signal (digital-to-analog converter, hereinafter called a xe2x80x9cDACxe2x80x9d) as well as in a characteristic test for an A/D converter circuit for converting an analog signal into a digital signal (hereinafter called an xe2x80x9cADCxe2x80x9d). In association with an increase in the precision of the characteristic test, embodiment of a low-cost test apparatus compatible with a semiconductor integrated circuit including the DAC and ADC has posed a challenge.
In a testing environment of a general tester, connection jigs for connecting a tester with a DUT (device under test), such as a plurality of DUT circuit boards (simply called xe2x80x9cDUT boardsxe2x80x9d) and cables, are provided at a plurality of points along a measurement path extending from measurement equipment provided in the tester to a semiconductor integrated circuit (hereinafter called a xe2x80x9cDUTxe2x80x9d). Further, the measurement path is long and accounts for occurrence of noise and a drop in measurement accuracy. Further, simultaneous testing of a plurality of DUTs is also impossible. A limitation is imposed on the speed of a low-speed tester, and hence the low-speed tester cannot conduct a test at a real operating speed, thereby posing a fear of an increase in a time required for conducting mass-production testing of a system LSI.
Japanese Patent Application Laid-Open No. 316024/1989 describes a tester. The tester is equipped with a memory device for storing conversion data at an address designated by input data which have been entered into a DAC of a test circuit. An analog signal which has been subjected to digital-to-analog conversion is input to an ADC, and an output from the ADC is sequentially stored in the memory device. After conversion of all the input data sets has been completed, the conversion data stored in the memory device are sequentially delivered to a tester. The tester sequentially compares the input data with the conversion data, thus producing a test conclusion.
However, the tester must supply data to be input to the DAC, an address to be used for storing conversion data into a memory device, and a control signal. Moreover, data stored in the memory device must be supplied to the tester. Further, there is the probability that noise arising in a long measurement path extending from the tester to a DUT may deteriorate precision of measurement. Further, the majority of pin electronics provided on the tester are occupied for testing a single DUT, thereby posing a difficulty in simultaneous measurement of a plurality of DUTs.
Further, communication for transmitting conversion data to the tester is time consuming, and test conclusions are produced after completion of all tests. Hence, shortening of a test time is also difficult.
The present invention has been conceived to solve such a problem and is aimed at providing an apparatus of testing a semiconductor integrated circuit, which apparatus facilitates control of a BOST device and improve the versatility thereof.
According to one aspect of the present invention, an apparatus for testing a semiconductor integrated circuit is provided for testing a semiconductor integrated circuit which includes an analog-to-digital converter circuit for converting an analog signal into a digital signal and a digital-to-analog converter circuit for converting a digital signal into an analog signal. The apparatus for testing comprises a test circuit board for testing the semiconductor integrated circuit, by means of exchanging signals with the semiconductor integrated circuit. Further the apparatus comprises a test ancillary device which is disposed in the vicinity of the test circuit board and is connected to the test circuit board, and an external controller which is connected to the test ancillary device and has a CPU. The test ancillary device comprises an interface for exchanging a signal with the CPU of the external controller. Further the test ancillary device comprises a data circuit which produces a digital test signal on the basis of a signal output from the CPU by way of the interface and supplies the digital test signal to the digital-to-analog converter circuit of the semiconductor integrated circuit. Further the test ancillary device comprises a digital-to-analog converter circuit for test purpose which converts the digital test signal output from the data circuit into an analog test signal and supplies the analog test signal to the analog-to-digital converter circuit of the semiconductor integrated circuit. Further the test ancillary device comprises an analog-to-digital converter circuit for test purpose which converts, into a digital test output, an analog test output from the digital-to-analog converter circuit of the semiconductor integrated circuit. Further the test ancillary device comprises measured data memory for storing a digital test output from the analog-to-digital converter circuit of the semiconductor integrated circuit and a digital test output from the analog-to-digital converter circuit for test purpose. Further the test ancillary device comprises an analysis section for analyzing the digital test outputs stored in the measured data memory in response to a control signal output from the CPU of the external controller, and supplying the result of the analysis to the external controller by way of the interface.
According to another aspect of the present invention, an apparatus for testing a semiconductor integrated circuit is provided for testing a semiconductor integrated circuit which includes an analog-to-digital converter circuit for converting an analog signal into a digital signal and a digital-to-analog converter circuit for converting a digital signal into an analog signal. The apparatus for testing comprises a test circuit board for testing the semiconductor integrated circuit, by means of exchanging signals with the semiconductor integrated circuit. Further the apparatus comprises a test ancillary device which is disposed in the vicinity of the test circuit board and is connected to the test circuit board. Further the apparatus comprises an external controller which is connected to the test ancillary device and produces and outputs a signal waveform from a clock signal and a test pattern signal in accordance with a test program. The test ancillary device comprises an interface for exchanging a signal with the external controller. Further the test ancillary device comprises a data circuit which produces a digital test signal on the basis of the signal waveform output received by way of the interface and supplies the digital test signal to the digital-to-analog converter circuit of the semiconductor integrated circuit. Further the test ancillary device comprises a digital-to-analog converter circuit for test purpose which converts the digital test signal output from the data circuit into an analog test signal and supplies the analog test signal to the analog-to-digital converter circuit of the semiconductor integrated circuit. Further the test ancillary device comprises an analog-to-digital converter circuit for test purpose which converts, into a digital test output, an analog test output from the digital-to-analog converter circuit of the semiconductor integrated circuit. Further the test ancillary device comprises measured data memory for storing a digital test output from the analog-to-digital converter circuit of the semiconductor integrated circuit and a digital test output from the analog-to-digital converter circuit for test purpose. Further the test ancillary device comprises an analysis section for analyzing the digital test outputs stored in the measured data memory, and supplying the result of the analysis to the external controller by way of the interface. The external controller renders a determination on the result of the analysis.
According to another aspect of the present invention, an apparatus for testing a semiconductor integrated circuit is provided for testing a semiconductor integrated circuit which includes an analog-to-digital converter circuit for converting an analog signal into a digital signal and a digital-to-analog converter circuit for converting a digital signal into an analog signal. The apparatus for testing comprises a test circuit board for testing the semiconductor integrated circuit, by means of exchanging signals with the semiconductor integrated circuit. Further the apparatus comprises a test ancillary device which is disposed in the vicinity of the test circuit board and is connected to the test circuit board, and an external controller which is connected to the test ancillary device. The test ancillary device comprises a communications scheme conversion module which can communicate with the external controller by means of a plurality of communications schemes and converts the communications schemes into a custom-made bus scheme in the test ancillary device. Further the ancillary device comprises a data circuit which produces a digital test signal and supplies the digital test signal to the digital-to-analog converter circuit of the semiconductor integrated circuit. Further the ancillary device comprises a digital-to-analog converter circuit for test purpose which converts the digital test signal output from the data circuit into an analog test signal and supplies the analog test signal to the analog-to-digital converter circuit of the semiconductor integrated circuit. Further the ancillary device comprises an analog-to-digital converter circuit for test purpose which converts, into a digital test output, an analog test output from the digital-to-analog converter circuit of the semiconductor integrated circuit. Further the ancillary device comprises measured data memory for storing a digital test output from the analog-to-digital converter circuit of the semiconductor integrated circuit and a digital test output from the analog-to-digital converter circuit for test purpose. Further the ancillary device comprises an analysis section for analyzing the digital test outputs stored in the measured data memory, and supplying the result of the analysis to the external controller.
Other and further objects, features and advantages of the invention will appear more fully from the following description.